The present technology relates to a semiconductor device and a method of manufacturing the semiconductor device, and more particularly, to a semiconductor device in which elements are disposed 3-dimensionally by laminating a plurality of semiconductor layers, a solid-state imaging device using the semiconductor device, and a method of manufacturing such a semiconductor device.
As one of the structures configured to achieve higher integration of a semiconductor device, a 3-dimensional structure in which elements with different characteristics are laminated in a plurality of layers has been suggested. In the semiconductor device having such a 3-dimensional structure, there are, for example, the following two configurations.
A first configuration is a configuration in which a plurality of substrates in which elements are formed are prepared and these substrates are bonded to each other. In this case, for example, connection electrodes connected to the elements are configured to be extracted toward the bonded surface sides of the substrates. By joining the extracted connection electrodes with the connection electrodes, two substrates are bonded so that the substrates can be electrically connected to each other (hitherto, for example, see Japanese Unexamined Patent Application Publication No. 2005-268662).
A second configuration is a configuration in which elements including a second semiconductor layer are formed on a substrate in which elements including a first semiconductor layer are formed via an inter-layer insulation film, and the elements of the layers are connected in an upper layer (hitherto, for example, see Japanese Unexamined Patent Application Publication No. 2009-94495).